Memory PC or PC2 is it the same isn't it all DDR2?

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  • Art Vandelay
    Digital Video Technician
    Digital Video Technician
    • Feb 2006
    • 442

    Memory PC or PC2 is it the same isn't it all DDR2?

    I was reading about my mother board and I am unsure what this means:

    <TABLE cellSpacing=1 cellPadding=4 width=560 bgColor=#cccccc summary="" border=0><TBODY vAlign=top><TR bgColor=#ffffff><TD vAlign=top align=left>Memory </TD><TD vAlign=top align=left>
    • Four 240-pin DDR2 DIMM sockets
    • Supports PC 4200 (533 MHz) and PC2 5300 (667 MHz) DDR2 DIMMs
    • non-ECC memory only, unbuffered
    • Maximum HP/Compaq approved memory is 4 GB*
    </TD></TR></TBODY></TABLE>

    What has me confused is the PC 4200 (533 MHz) and then it talks about PC2 5300 (667 MHz) DDR2 ram. Why is it refering to the 667 MHz speed as PC2 and doesn't refer to the first ram suported as PC2 it is just PC???

    CPU-Z says I have

    Memory Type DDR2
    Memory Size 1024 MBytes
    Memory Frequency 267.2 MHz (CPU/9)
    CAS# 4.0
    RAS# to CAS# 4
    RAS# Precharge 4
    Cycle Time (tRAS) 12
    Bank Cycle Time (tRC) 17
    Command Rate 1T

    Processor 1 (ID = 0)
    Number of cores 2
    Number of threads 2 (max 2)
    Name AMD Athlon 64 X2 4600+
    Codename Windsor
    Specification AMD Athlon(tm) 64 X2 Dual Core Processor 4600+
    Package Socket AM2 (940)
    CPUID F.B.2
    Extended CPUID F.4B
    Brand ID 4
    Core Stepping BH-F2
    Technology 90 nm
    Core Speed 2405.1 MHz (12.0 x 200.4 MHz)
    HT Link speed 1002.1 MHz
    Stock frequency 2400 MHz
    Instructions sets MMX (+), 3DNow! (+), SSE, SSE2, SSE3, x86-64
    L1 Data cache 2 x 64 KBytes, 2-way set associative, 64-byte line size
    L1 Instruction cache 2 x 64 KBytes, 2-way set associative, 64-byte line size
    L2 cache 2 x 512 KBytes, 16-way set associative, 64-byte line size
    FID/VID Control yes
    max FID 12.0x
    VID range 1.125V - 1.400V
    K8 Thermal sensor yes
    K8 Revision ID 5.2
    Attached device PCI device at bus 0, device 24, function 0
    Attached device PCI device at bus 0, device 24, function 1
    Attached device PCI device at bus 0, device 24, function 2
    Attached device PCI device at bus 0, device 24, function 3
  • atifsh
    Lord of Digital Video
    Lord of Digital Video
    • May 2003
    • 1534

    #2
    Four 240-pin DDR2 DIMM sockets
    enough to remove ur confusion....

    i think that was a typo, 533 is ddr2 u wont get ddr 1 at 533.
    u get ddr2 at 400 though that make me nuts last year...
    Seems like as soon you buy somehing, v. 2 comes out 1.5 times as fast!..!

    Comment

    • Chewy
      Super Moderator
      • Nov 2003
      • 18971

      #3
      ddr2 started at 400 and 533(266x2) going to 800 and 1066(533x2)

      ddr3 may be starting at 1333 but I am not up to snuff on it yet

      pc2 is a typo

      HP/Compaq does it again fast cpu, slow ram

      my old ddr1 500 is cas 2.5 and way faster than ddr2 533 running at cas 4

      Comment

      • MilesAhead
        Eclectician
        • Nov 2006
        • 2615

        #4
        Chewy is there a good RAM 101 page on the web for the uninitiated to get the gist of what's what? I notice I never hear the term "wait state" anymore. So I'm thinking either things technical got more complicated or marketing won't let them use that phrase anymore.

        Comment

        • Chewy
          Super Moderator
          • Nov 2003
          • 18971

          #5
          I saw one guide written over a year ago but even that's way out of date

          and what really complicates matters is how the ram interacts with the different architecture of cpu's

          amd does significantly better across the board with faster lower cas ram, intel's new core technology still has a longer pipeline and low cas does not help that much until the cpu's are overclocked a lot and then it's crucial

          and then you have to factor in, does an application need just a little fast ram to keep up with the cpu or it really needs a lot of ram and the ram speed isn't as important

          Comment

          • MilesAhead
            Eclectician
            • Nov 2006
            • 2615

            #6
            I can imagine with the multiple cores stuff's gotten way more complicated. I took a debug class eons ago and the lecturer delighted in demonstrating his program that accessed memory strategically to make the on chip cache keep dumping. A worst-case scenario to show cache doesn't improve performance in every situation(which never convinced anyone to disable theirs though.)

            Comment

            • Chewy
              Super Moderator
              • Nov 2003
              • 18971

              #7
              In a multicore enviroment, I would think the speed issues would be the same, but the amount of ram the app would need would just be 2x or 4x compared to a single core.

              Comment

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