I have run into a very unusual situation concerning Tmpenc and AMD Athlon XP processors.
I have tried numerous times without success to use Tmpgenc to convert PAL DVD VIDEO files to NTSC format. The end result is a grossly out of sync video/sound track and the problem appears to be between the processor and Tmpgenc.
When I start Tmpenc I get a CPU notice immediately stating that the CPU settings have been changed back to default because the processor might have changed from the previous time Tmpgenc was used.
I looked in the default environmental settings and all options are checked except for the SSE which is grayed out. I did some research on SSE and it has to do with Pentium class chips not AMD Athlon processors. However, after speaking with AMD technical support about this issue my suspicisions are confirmed. The AMD Athlon XP chip doesn't support either SSE-2, or MMX-2 instructions which Tmpgenc seeks. They told me that SSE-1 and MMX are supported. Unfortunately, the SSE-1 option is not available because of being disabled in the options area of the Tmpgenc environmental variables area of the CPU settings area.
Does anyone know of a version of TMPGENC that supports SSE-1 instructions only? I think this is the issue and without this code I don't think this product will function correctly with any AMD XP ATHLON processor.
The only other option is to find another program similar to Tmpgenc that does accept SSE-1 instructions.
I would appreciate any insight into this problem
regards,
barrya1
mcse/ccna
I have tried numerous times without success to use Tmpgenc to convert PAL DVD VIDEO files to NTSC format. The end result is a grossly out of sync video/sound track and the problem appears to be between the processor and Tmpgenc.
When I start Tmpenc I get a CPU notice immediately stating that the CPU settings have been changed back to default because the processor might have changed from the previous time Tmpgenc was used.
I looked in the default environmental settings and all options are checked except for the SSE which is grayed out. I did some research on SSE and it has to do with Pentium class chips not AMD Athlon processors. However, after speaking with AMD technical support about this issue my suspicisions are confirmed. The AMD Athlon XP chip doesn't support either SSE-2, or MMX-2 instructions which Tmpgenc seeks. They told me that SSE-1 and MMX are supported. Unfortunately, the SSE-1 option is not available because of being disabled in the options area of the Tmpgenc environmental variables area of the CPU settings area.
Does anyone know of a version of TMPGENC that supports SSE-1 instructions only? I think this is the issue and without this code I don't think this product will function correctly with any AMD XP ATHLON processor.
The only other option is to find another program similar to Tmpgenc that does accept SSE-1 instructions.
I would appreciate any insight into this problem
regards,
barrya1
mcse/ccna
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